/*
 * Copyright (c) 2013-2014 Travis Geiselbrecht
 *
 * Use of this source code is governed by a MIT-style
 * license that can be found in the LICENSE file or at
 * https://opensource.org/licenses/MIT
 */

#include <lk/debug.h>
#include <lk/compiler.h>
#include <arch/arm/cm.h>
#include <target/debugconfig.h>
#include <lib/cbuf.h>
#include <platform/imxrt.h>

/* un-overridden irq handler */
void rt1020_dummy_irq(void) {
    arm_cm_irq_entry();

    panic("unhandled irq\n");
}

/* a list of default handlers that are simply aliases to the dummy handler */
#define DEFAULT_HANDLER(x) \
void rt1020_drv_##x(void) __WEAK_ALIAS("rt1020_dummy_irq");

DEFAULT_HANDLER(DMA0_DMA16_IRQ);
DEFAULT_HANDLER(DMA1_DMA17_IRQ);
DEFAULT_HANDLER(DMA2_DMA18_IRQ);
DEFAULT_HANDLER(DMA3_DMA19_IRQ);
DEFAULT_HANDLER(DMA4_DMA20_IRQ);
DEFAULT_HANDLER(DMA5_DMA21_IRQ);
DEFAULT_HANDLER(DMA6_DMA22_IRQ);
DEFAULT_HANDLER(DMA7_DMA23_IRQ);
DEFAULT_HANDLER(DMA8_DMA24_IRQ);
DEFAULT_HANDLER(DMA9_DMA25_IRQ);
DEFAULT_HANDLER(DMA10_DMA26_IRQ);
DEFAULT_HANDLER(DMA11_DMA27_IRQ);
DEFAULT_HANDLER(DMA12_DMA28_IRQ);
DEFAULT_HANDLER(DMA13_DMA29_IRQ);
DEFAULT_HANDLER(DMA14_DMA30_IRQ);
DEFAULT_HANDLER(DMA15_DMA31_IRQ);
DEFAULT_HANDLER(DMA_ERROR_IRQ);
DEFAULT_HANDLER(CTI0_ERROR_IRQ);
DEFAULT_HANDLER(CTI1_ERROR_IRQ);
DEFAULT_HANDLER(CORE_IRQ);
DEFAULT_HANDLER(LPUART1_IRQ);
DEFAULT_HANDLER(LPUART2_IRQ);
DEFAULT_HANDLER(LPUART3_IRQ);
DEFAULT_HANDLER(LPUART4_IRQ);
DEFAULT_HANDLER(LPUART5_IRQ);
DEFAULT_HANDLER(LPUART6_IRQ);
DEFAULT_HANDLER(LPUART7_IRQ);
DEFAULT_HANDLER(LPUART8_IRQ);
DEFAULT_HANDLER(LPI2C1_IRQ);
DEFAULT_HANDLER(LPI2C2_IRQ);
DEFAULT_HANDLER(LPI2C3_IRQ);
DEFAULT_HANDLER(LPI2C4_IRQ);
DEFAULT_HANDLER(LPSPI1_IRQ);
DEFAULT_HANDLER(LPSPI2_IRQ);
DEFAULT_HANDLER(LPSPI3_IRQ);
DEFAULT_HANDLER(LPSPI4_IRQ);
DEFAULT_HANDLER(CAN1_IRQ);
DEFAULT_HANDLER(CAN2_IRQ);
DEFAULT_HANDLER(FLEXRAM_IRQ);
DEFAULT_HANDLER(KPP_IRQ);
DEFAULT_HANDLER(Reserved56_IRQ);
DEFAULT_HANDLER(GPR_IRQ_IRQ);
DEFAULT_HANDLER(Reserved58_IRQ);
DEFAULT_HANDLER(Reserved59_IRQ);
DEFAULT_HANDLER(Reserved60_IRQ);
DEFAULT_HANDLER(WDOG2_IRQ);
DEFAULT_HANDLER(SNVS_HP_WRAPPER_IRQ);
DEFAULT_HANDLER(SNVS_HP_WRAPPER_TZ_IRQ);
DEFAULT_HANDLER(SNVS_LP_HP_WRAPPER_IRQ);
DEFAULT_HANDLER(CSU_IRQ);
DEFAULT_HANDLER(DCP_IRQ);
DEFAULT_HANDLER(DCP_VMI_IRQ);
DEFAULT_HANDLER(Reserved68_IRQ);
DEFAULT_HANDLER(TRNG_IRQ);
DEFAULT_HANDLER(Reserved70_IRQ);
DEFAULT_HANDLER(BEE_IRQ);
DEFAULT_HANDLER(SAI1_IRQ);
DEFAULT_HANDLER(SAI2_IRQ);
DEFAULT_HANDLER(SAI3_RX_IRQ);
DEFAULT_HANDLER(SAI3_TX_IRQ);
DEFAULT_HANDLER(SPDIF_IRQ);
DEFAULT_HANDLER(PMU_IRQ);
DEFAULT_HANDLER(Reserved78_IRQ);
DEFAULT_HANDLER(TEMP_LOW_HIGH_IRQ);
DEFAULT_HANDLER(TEMP_PANIC_IRQ);
DEFAULT_HANDLER(USB_PHY_IRQ);
DEFAULT_HANDLER(Reserved82_IRQ);
DEFAULT_HANDLER(ADC1_IRQ);
DEFAULT_HANDLER(ADC2_IRQ);
DEFAULT_HANDLER(DCDC_IRQ);
DEFAULT_HANDLER(Reserved86_IRQ);
DEFAULT_HANDLER(Reserved87_IRQ);
DEFAULT_HANDLER(GPIO1_INT0_IRQ);
DEFAULT_HANDLER(GPIO1_INT1_IRQ);
DEFAULT_HANDLER(GPIO1_INT2_IRQ);
DEFAULT_HANDLER(GPIO1_INT3_IRQ);
DEFAULT_HANDLER(GPIO1_INT4_IRQ);
DEFAULT_HANDLER(GPIO1_INT5_IRQ);
DEFAULT_HANDLER(GPIO1_INT6_IRQ);
DEFAULT_HANDLER(GPIO1_INT7_IRQ);
DEFAULT_HANDLER(GPIO1_Combined_0_15_IRQ);
DEFAULT_HANDLER(GPIO1_Combined_16_31_IRQ);
DEFAULT_HANDLER(GPIO2_Combined_0_15_IRQ);
DEFAULT_HANDLER(GPIO2_Combined_16_31_IRQ);
DEFAULT_HANDLER(GPIO3_Combined_0_15_IRQ);
DEFAULT_HANDLER(GPIO3_Combined_16_31_IRQ);
DEFAULT_HANDLER(Reserved102_IRQ);
DEFAULT_HANDLER(Reserved103_IRQ);
DEFAULT_HANDLER(GPIO5_Combined_0_15_IRQ);
DEFAULT_HANDLER(GPIO5_Combined_16_31_IRQ);
DEFAULT_HANDLER(FLEXIO1_IRQ);
DEFAULT_HANDLER(Reserved107_IRQ);
DEFAULT_HANDLER(WDOG1_IRQ);
DEFAULT_HANDLER(RTWDOG_IRQ);
DEFAULT_HANDLER(EWM_IRQ);
DEFAULT_HANDLER(CCM_1_IRQ);
DEFAULT_HANDLER(CCM_2_IRQ);
DEFAULT_HANDLER(GPC_IRQ);
DEFAULT_HANDLER(SRC_IRQ);
DEFAULT_HANDLER(Reserved115_IRQ);
DEFAULT_HANDLER(GPT1_IRQ);
DEFAULT_HANDLER(GPT2_IRQ);
DEFAULT_HANDLER(PWM1_0_IRQ);
DEFAULT_HANDLER(PWM1_1_IRQ);
DEFAULT_HANDLER(PWM1_2_IRQ);
DEFAULT_HANDLER(PWM1_3_IRQ);
DEFAULT_HANDLER(PWM1_FAULT_IRQ);
DEFAULT_HANDLER(Reserved123_IRQ);
DEFAULT_HANDLER(FLEXSPI_IRQ);
DEFAULT_HANDLER(SEMC_IRQ);
DEFAULT_HANDLER(USDHC1_IRQ);
DEFAULT_HANDLER(USDHC2_IRQ);
DEFAULT_HANDLER(Reserved128_IRQ);
DEFAULT_HANDLER(USB_OTG1_IRQ);
DEFAULT_HANDLER(ENET_IRQ);
DEFAULT_HANDLER(ENET_1588_Timer_IRQ);
DEFAULT_HANDLER(XBAR1_IRQ_0_1_IRQ);
DEFAULT_HANDLER(XBAR1_IRQ_2_3_IRQ);
DEFAULT_HANDLER(ADC_ETC_IRQ0_IRQ);
DEFAULT_HANDLER(ADC_ETC_IRQ1_IRQ);
DEFAULT_HANDLER(ADC_ETC_IRQ2_IRQ);
DEFAULT_HANDLER(ADC_ETC_ERROR_IRQ_IRQ);
DEFAULT_HANDLER(PIT_IRQ);
DEFAULT_HANDLER(ACMP1_IRQ);
DEFAULT_HANDLER(ACMP2_IRQ);
DEFAULT_HANDLER(ACMP3_IRQ);
DEFAULT_HANDLER(ACMP4_IRQ);
DEFAULT_HANDLER(Reserved143_IRQ);
DEFAULT_HANDLER(Reserved144_IRQ);
DEFAULT_HANDLER(ENC1_IRQ);
DEFAULT_HANDLER(ENC2_IRQ);
DEFAULT_HANDLER(Reserved147_IRQ);
DEFAULT_HANDLER(Reserved148_IRQ);
DEFAULT_HANDLER(TMR1_IRQ);
DEFAULT_HANDLER(TMR2_IRQ);
DEFAULT_HANDLER(Reserved151_IRQ);
DEFAULT_HANDLER(Reserved152_IRQ);
DEFAULT_HANDLER(PWM2_0_IRQ);
DEFAULT_HANDLER(PWM2_1_IRQ);
DEFAULT_HANDLER(PWM2_2_IRQ);
DEFAULT_HANDLER(PWM2_3_IRQ);
DEFAULT_HANDLER(PWM2_FAULT_IRQ);


__WEAK void rt1020_DMA0_DMA16_IRQ(void){rt1020_drv_DMA0_DMA16_IRQ();}
__WEAK void rt1020_DMA1_DMA17_IRQ(void){rt1020_drv_DMA1_DMA17_IRQ();}
__WEAK void rt1020_DMA2_DMA18_IRQ(void){rt1020_drv_DMA2_DMA18_IRQ();}
__WEAK void rt1020_DMA3_DMA19_IRQ(void){rt1020_drv_DMA3_DMA19_IRQ();}
__WEAK void rt1020_DMA4_DMA20_IRQ(void){rt1020_drv_DMA4_DMA20_IRQ();}
__WEAK void rt1020_DMA5_DMA21_IRQ(void){rt1020_drv_DMA5_DMA21_IRQ();}
__WEAK void rt1020_DMA6_DMA22_IRQ(void){rt1020_drv_DMA6_DMA22_IRQ();}
__WEAK void rt1020_DMA7_DMA23_IRQ(void){rt1020_drv_DMA7_DMA23_IRQ();}
__WEAK void rt1020_DMA8_DMA24_IRQ(void){rt1020_drv_DMA8_DMA24_IRQ();}
__WEAK void rt1020_DMA9_DMA25_IRQ(void){rt1020_drv_DMA9_DMA25_IRQ();}
__WEAK void rt1020_DMA10_DMA26_IRQ(void){rt1020_drv_DMA10_DMA26_IRQ();}
__WEAK void rt1020_DMA11_DMA27_IRQ(void){rt1020_drv_DMA11_DMA27_IRQ();}
__WEAK void rt1020_DMA12_DMA28_IRQ(void){rt1020_drv_DMA12_DMA28_IRQ();}
__WEAK void rt1020_DMA13_DMA29_IRQ(void){rt1020_drv_DMA13_DMA29_IRQ();}
__WEAK void rt1020_DMA14_DMA30_IRQ(void){rt1020_drv_DMA14_DMA30_IRQ();}
__WEAK void rt1020_DMA15_DMA31_IRQ(void){rt1020_drv_DMA15_DMA31_IRQ();}
__WEAK void rt1020_DMA_ERROR_IRQ(void){rt1020_drv_DMA_ERROR_IRQ();}
__WEAK void rt1020_CTI0_ERROR_IRQ(void){rt1020_drv_CTI0_ERROR_IRQ();}
__WEAK void rt1020_CTI1_ERROR_IRQ(void){rt1020_drv_CTI1_ERROR_IRQ();}
__WEAK void rt1020_CORE_IRQ(void){rt1020_drv_CORE_IRQ();}
__WEAK void rt1020_LPUART1_IRQ(void){rt1020_drv_LPUART1_IRQ();}
__WEAK void rt1020_LPUART2_IRQ(void){rt1020_drv_LPUART2_IRQ();}
__WEAK void rt1020_LPUART3_IRQ(void){rt1020_drv_LPUART3_IRQ();}
__WEAK void rt1020_LPUART4_IRQ(void){rt1020_drv_LPUART4_IRQ();}
__WEAK void rt1020_LPUART5_IRQ(void){rt1020_drv_LPUART5_IRQ();}
__WEAK void rt1020_LPUART6_IRQ(void){rt1020_drv_LPUART6_IRQ();}
__WEAK void rt1020_LPUART7_IRQ(void){rt1020_drv_LPUART7_IRQ();}
__WEAK void rt1020_LPUART8_IRQ(void){rt1020_drv_LPUART8_IRQ();}
__WEAK void rt1020_LPI2C1_IRQ(void){rt1020_drv_LPI2C1_IRQ();}
__WEAK void rt1020_LPI2C2_IRQ(void){rt1020_drv_LPI2C2_IRQ();}
__WEAK void rt1020_LPI2C3_IRQ(void){rt1020_drv_LPI2C3_IRQ();}
__WEAK void rt1020_LPI2C4_IRQ(void){rt1020_drv_LPI2C4_IRQ();}
__WEAK void rt1020_LPSPI1_IRQ(void){rt1020_drv_LPSPI1_IRQ();}
__WEAK void rt1020_LPSPI2_IRQ(void){rt1020_drv_LPSPI2_IRQ();}
__WEAK void rt1020_LPSPI3_IRQ(void){rt1020_drv_LPSPI3_IRQ();}
__WEAK void rt1020_LPSPI4_IRQ(void){rt1020_drv_LPSPI4_IRQ();}
__WEAK void rt1020_CAN1_IRQ(void){rt1020_drv_CAN1_IRQ();}
__WEAK void rt1020_CAN2_IRQ(void){rt1020_drv_CAN2_IRQ();}
__WEAK void rt1020_FLEXRAM_IRQ(void){rt1020_drv_FLEXRAM_IRQ();}
__WEAK void rt1020_KPP_IRQ(void){rt1020_drv_KPP_IRQ();}
__WEAK void rt1020_Reserved56_IRQ(void){rt1020_drv_Reserved56_IRQ();}
__WEAK void rt1020_GPR_IRQ_IRQ(void){rt1020_drv_GPR_IRQ_IRQ();}
__WEAK void rt1020_Reserved58_IRQ(void){rt1020_drv_Reserved58_IRQ();}
__WEAK void rt1020_Reserved59_IRQ(void){rt1020_drv_Reserved59_IRQ();}
__WEAK void rt1020_Reserved60_IRQ(void){rt1020_drv_Reserved60_IRQ();}
__WEAK void rt1020_WDOG2_IRQ(void){rt1020_drv_WDOG2_IRQ();}
__WEAK void rt1020_SNVS_HP_WRAPPER_IRQ(void){rt1020_drv_SNVS_HP_WRAPPER_IRQ();}
__WEAK void rt1020_SNVS_HP_WRAPPER_TZ_IRQ(void){rt1020_drv_SNVS_HP_WRAPPER_TZ_IRQ();}
__WEAK void rt1020_SNVS_LP_HP_WRAPPER_IRQ(void){rt1020_drv_SNVS_LP_HP_WRAPPER_IRQ();}
__WEAK void rt1020_CSU_IRQ(void){rt1020_drv_CSU_IRQ();}
__WEAK void rt1020_DCP_IRQ(void){rt1020_drv_DCP_IRQ();}
__WEAK void rt1020_DCP_VMI_IRQ(void){rt1020_drv_DCP_VMI_IRQ();}
__WEAK void rt1020_Reserved68_IRQ(void){rt1020_drv_Reserved68_IRQ();}
__WEAK void rt1020_TRNG_IRQ(void){rt1020_drv_TRNG_IRQ();}
__WEAK void rt1020_Reserved70_IRQ(void){rt1020_drv_Reserved70_IRQ();}
__WEAK void rt1020_BEE_IRQ(void){rt1020_drv_BEE_IRQ();}
__WEAK void rt1020_SAI1_IRQ(void){rt1020_drv_SAI1_IRQ();}
__WEAK void rt1020_SAI2_IRQ(void){rt1020_drv_SAI2_IRQ();}
__WEAK void rt1020_SAI3_RX_IRQ(void){rt1020_drv_SAI3_RX_IRQ();}
__WEAK void rt1020_SAI3_TX_IRQ(void){rt1020_drv_SAI3_TX_IRQ();}
__WEAK void rt1020_SPDIF_IRQ(void){rt1020_drv_SPDIF_IRQ();}
__WEAK void rt1020_PMU_IRQ(void){rt1020_drv_PMU_IRQ();}
__WEAK void rt1020_Reserved78_IRQ(void){rt1020_drv_Reserved78_IRQ();}
__WEAK void rt1020_TEMP_LOW_HIGH_IRQ(void){rt1020_drv_TEMP_LOW_HIGH_IRQ();}
__WEAK void rt1020_TEMP_PANIC_IRQ(void){rt1020_drv_TEMP_PANIC_IRQ();}
__WEAK void rt1020_USB_PHY_IRQ(void){rt1020_drv_USB_PHY_IRQ();}
__WEAK void rt1020_Reserved82_IRQ(void){rt1020_drv_Reserved82_IRQ();}
__WEAK void rt1020_ADC1_IRQ(void){rt1020_drv_ADC1_IRQ();}
__WEAK void rt1020_ADC2_IRQ(void){rt1020_drv_ADC2_IRQ();}
__WEAK void rt1020_DCDC_IRQ(void){rt1020_drv_DCDC_IRQ();}
__WEAK void rt1020_Reserved86_IRQ(void){rt1020_drv_Reserved86_IRQ();}
__WEAK void rt1020_Reserved87_IRQ(void){rt1020_drv_Reserved87_IRQ();}
__WEAK void rt1020_GPIO1_INT0_IRQ(void){rt1020_drv_GPIO1_INT0_IRQ();}
__WEAK void rt1020_GPIO1_INT1_IRQ(void){rt1020_drv_GPIO1_INT1_IRQ();}
__WEAK void rt1020_GPIO1_INT2_IRQ(void){rt1020_drv_GPIO1_INT2_IRQ();}
__WEAK void rt1020_GPIO1_INT3_IRQ(void){rt1020_drv_GPIO1_INT3_IRQ();}
__WEAK void rt1020_GPIO1_INT4_IRQ(void){rt1020_drv_GPIO1_INT4_IRQ();}
__WEAK void rt1020_GPIO1_INT5_IRQ(void){rt1020_drv_GPIO1_INT5_IRQ();}
__WEAK void rt1020_GPIO1_INT6_IRQ(void){rt1020_drv_GPIO1_INT6_IRQ();}
__WEAK void rt1020_GPIO1_INT7_IRQ(void){rt1020_drv_GPIO1_INT7_IRQ();}
__WEAK void rt1020_GPIO1_Combined_0_15_IRQ(void){rt1020_drv_GPIO1_Combined_0_15_IRQ();}
__WEAK void rt1020_GPIO1_Combined_16_31_IRQ(void){rt1020_drv_GPIO1_Combined_16_31_IRQ();}
__WEAK void rt1020_GPIO2_Combined_0_15_IRQ(void){rt1020_drv_GPIO2_Combined_0_15_IRQ();}
__WEAK void rt1020_GPIO2_Combined_16_31_IRQ(void){rt1020_drv_GPIO2_Combined_16_31_IRQ();}
__WEAK void rt1020_GPIO3_Combined_0_15_IRQ(void){rt1020_drv_GPIO3_Combined_0_15_IRQ();}
__WEAK void rt1020_GPIO3_Combined_16_31_IRQ(void){rt1020_drv_GPIO3_Combined_16_31_IRQ();}
__WEAK void rt1020_Reserved102_IRQ(void){rt1020_drv_Reserved102_IRQ();}
__WEAK void rt1020_Reserved103_IRQ(void){rt1020_drv_Reserved103_IRQ();}
__WEAK void rt1020_GPIO5_Combined_0_15_IRQ(void){rt1020_drv_GPIO5_Combined_0_15_IRQ();}
__WEAK void rt1020_GPIO5_Combined_16_31_IRQ(void){rt1020_drv_GPIO5_Combined_16_31_IRQ();}
__WEAK void rt1020_FLEXIO1_IRQ(void){rt1020_drv_FLEXIO1_IRQ();}
__WEAK void rt1020_Reserved107_IRQ(void){rt1020_drv_Reserved107_IRQ();}
__WEAK void rt1020_WDOG1_IRQ(void){rt1020_drv_WDOG1_IRQ();}
__WEAK void rt1020_RTWDOG_IRQ(void){rt1020_drv_RTWDOG_IRQ();}
__WEAK void rt1020_EWM_IRQ(void){rt1020_drv_EWM_IRQ();}
__WEAK void rt1020_CCM_1_IRQ(void){rt1020_drv_CCM_1_IRQ();}
__WEAK void rt1020_CCM_2_IRQ(void){rt1020_drv_CCM_2_IRQ();}
__WEAK void rt1020_GPC_IRQ(void){rt1020_drv_GPC_IRQ();}
__WEAK void rt1020_SRC_IRQ(void){rt1020_drv_SRC_IRQ();}
__WEAK void rt1020_Reserved115_IRQ(void){rt1020_drv_Reserved115_IRQ();}
__WEAK void rt1020_GPT1_IRQ(void){rt1020_drv_GPT1_IRQ();}
__WEAK void rt1020_GPT2_IRQ(void){rt1020_drv_GPT2_IRQ();}
__WEAK void rt1020_PWM1_0_IRQ(void){rt1020_drv_PWM1_0_IRQ();}
__WEAK void rt1020_PWM1_1_IRQ(void){rt1020_drv_PWM1_1_IRQ();}
__WEAK void rt1020_PWM1_2_IRQ(void){rt1020_drv_PWM1_2_IRQ();}
__WEAK void rt1020_PWM1_3_IRQ(void){rt1020_drv_PWM1_3_IRQ();}
__WEAK void rt1020_PWM1_FAULT_IRQ(void){rt1020_drv_PWM1_FAULT_IRQ();}
__WEAK void rt1020_Reserved123_IRQ(void){rt1020_drv_Reserved123_IRQ();}
__WEAK void rt1020_FLEXSPI_IRQ(void){rt1020_drv_FLEXSPI_IRQ();}
__WEAK void rt1020_SEMC_IRQ(void){rt1020_drv_SEMC_IRQ();}
__WEAK void rt1020_USDHC1_IRQ(void){rt1020_drv_USDHC1_IRQ();}
__WEAK void rt1020_USDHC2_IRQ(void){rt1020_drv_USDHC2_IRQ();}
__WEAK void rt1020_Reserved128_IRQ(void){rt1020_drv_Reserved128_IRQ();}
__WEAK void rt1020_USB_OTG1_IRQ(void){rt1020_drv_USB_OTG1_IRQ();}
__WEAK void rt1020_ENET_IRQ(void){rt1020_drv_ENET_IRQ();}
__WEAK void rt1020_ENET_1588_Timer_IRQ(void){rt1020_drv_ENET_1588_Timer_IRQ();}
__WEAK void rt1020_XBAR1_IRQ_0_1_IRQ(void){rt1020_drv_XBAR1_IRQ_0_1_IRQ();}
__WEAK void rt1020_XBAR1_IRQ_2_3_IRQ(void){rt1020_drv_XBAR1_IRQ_2_3_IRQ();}
__WEAK void rt1020_ADC_ETC_IRQ0_IRQ(void){rt1020_drv_ADC_ETC_IRQ0_IRQ();}
__WEAK void rt1020_ADC_ETC_IRQ1_IRQ(void){rt1020_drv_ADC_ETC_IRQ1_IRQ();}
__WEAK void rt1020_ADC_ETC_IRQ2_IRQ(void){rt1020_drv_ADC_ETC_IRQ2_IRQ();}
__WEAK void rt1020_ADC_ETC_ERROR_IRQ_IRQ(void){rt1020_drv_ADC_ETC_ERROR_IRQ_IRQ();}
__WEAK void rt1020_PIT_IRQ(void){rt1020_drv_PIT_IRQ();}
__WEAK void rt1020_ACMP1_IRQ(void){rt1020_drv_ACMP1_IRQ();}
__WEAK void rt1020_ACMP2_IRQ(void){rt1020_drv_ACMP2_IRQ();}
__WEAK void rt1020_ACMP3_IRQ(void){rt1020_drv_ACMP3_IRQ();}
__WEAK void rt1020_ACMP4_IRQ(void){rt1020_drv_ACMP4_IRQ();}
__WEAK void rt1020_Reserved143_IRQ(void){rt1020_drv_Reserved143_IRQ();}
__WEAK void rt1020_Reserved144_IRQ(void){rt1020_drv_Reserved144_IRQ();}
__WEAK void rt1020_ENC1_IRQ(void){rt1020_drv_ENC1_IRQ();}
__WEAK void rt1020_ENC2_IRQ(void){rt1020_drv_ENC2_IRQ();}
__WEAK void rt1020_Reserved147_IRQ(void){rt1020_drv_Reserved147_IRQ();}
__WEAK void rt1020_Reserved148_IRQ(void){rt1020_drv_Reserved148_IRQ();}
__WEAK void rt1020_TMR1_IRQ(void){rt1020_drv_TMR1_IRQ();}
__WEAK void rt1020_TMR2_IRQ(void){rt1020_drv_TMR2_IRQ();}
__WEAK void rt1020_Reserved151_IRQ(void){rt1020_drv_Reserved151_IRQ();}
__WEAK void rt1020_Reserved152_IRQ(void){rt1020_drv_Reserved152_IRQ();}
__WEAK void rt1020_PWM2_0_IRQ(void){rt1020_drv_PWM2_0_IRQ();}
__WEAK void rt1020_PWM2_1_IRQ(void){rt1020_drv_PWM2_1_IRQ();}
__WEAK void rt1020_PWM2_2_IRQ(void){rt1020_drv_PWM2_2_IRQ();}
__WEAK void rt1020_PWM2_3_IRQ(void){rt1020_drv_PWM2_3_IRQ();}
__WEAK void rt1020_PWM2_FAULT_IRQ(void){rt1020_drv_PWM2_FAULT_IRQ();}



#define VECTAB_ENTRY(x) [x##n] = rt1020_##x

/* appended to the end of the main vector table */
const void *const __SECTION(".text.boot.vectab2") vectab2[] = {
	VECTAB_ENTRY(DMA0_DMA16_IRQ),                           /* DMA channel 0/16 transfer complete*/
	VECTAB_ENTRY(DMA1_DMA17_IRQ),                           /* DMA channel 1/17 transfer complete*/
	VECTAB_ENTRY(DMA2_DMA18_IRQ),                           /* DMA channel 2/18 transfer complete*/
	VECTAB_ENTRY(DMA3_DMA19_IRQ),                           /* DMA channel 3/19 transfer complete*/
	VECTAB_ENTRY(DMA4_DMA20_IRQ),                           /* DMA channel 4/20 transfer complete*/
	VECTAB_ENTRY(DMA5_DMA21_IRQ),                           /* DMA channel 5/21 transfer complete*/
	VECTAB_ENTRY(DMA6_DMA22_IRQ),                           /* DMA channel 6/22 transfer complete*/
	VECTAB_ENTRY(DMA7_DMA23_IRQ),                           /* DMA channel 7/23 transfer complete*/
	VECTAB_ENTRY(DMA8_DMA24_IRQ),                           /* DMA channel 8/24 transfer complete*/
	VECTAB_ENTRY(DMA9_DMA25_IRQ),                           /* DMA channel 9/25 transfer complete*/
	VECTAB_ENTRY(DMA10_DMA26_IRQ),                          /* DMA channel 10/26 transfer complete*/
	VECTAB_ENTRY(DMA11_DMA27_IRQ),                          /* DMA channel 11/27 transfer complete*/
	VECTAB_ENTRY(DMA12_DMA28_IRQ),                          /* DMA channel 12/28 transfer complete*/
	VECTAB_ENTRY(DMA13_DMA29_IRQ),                          /* DMA channel 13/29 transfer complete*/
	VECTAB_ENTRY(DMA14_DMA30_IRQ),                          /* DMA channel 14/30 transfer complete*/
	VECTAB_ENTRY(DMA15_DMA31_IRQ),                          /* DMA channel 15/31 transfer complete*/
	VECTAB_ENTRY(DMA_ERROR_IRQ),                            /* DMA error interrupt channels 0-15 / 16-31*/
	VECTAB_ENTRY(CTI0_ERROR_IRQ),                           /* CTI trigger outputs*/
	VECTAB_ENTRY(CTI1_ERROR_IRQ),                           /* CTI trigger outputs*/
	VECTAB_ENTRY(CORE_IRQ),                                 /* CorePlatform exception IRQ*/
	VECTAB_ENTRY(LPUART1_IRQ),                              /* LPUART1 TX interrupt and RX interrupt*/
	VECTAB_ENTRY(LPUART2_IRQ),                              /* LPUART2 TX interrupt and RX interrupt*/
	VECTAB_ENTRY(LPUART3_IRQ),                              /* LPUART3 TX interrupt and RX interrupt*/
	VECTAB_ENTRY(LPUART4_IRQ),                              /* LPUART4 TX interrupt and RX interrupt*/
	VECTAB_ENTRY(LPUART5_IRQ),                              /* LPUART5 TX interrupt and RX interrupt*/
	VECTAB_ENTRY(LPUART6_IRQ),                              /* LPUART6 TX interrupt and RX interrupt*/
	VECTAB_ENTRY(LPUART7_IRQ),                              /* LPUART7 TX interrupt and RX interrupt*/
	VECTAB_ENTRY(LPUART8_IRQ),                              /* LPUART8 TX interrupt and RX interrupt*/
	VECTAB_ENTRY(LPI2C1_IRQ),                               /* LPI2C1 interrupt*/
	VECTAB_ENTRY(LPI2C2_IRQ),                               /* LPI2C2 interrupt*/
	VECTAB_ENTRY(LPI2C3_IRQ),                               /* LPI2C3 interrupt*/
	VECTAB_ENTRY(LPI2C4_IRQ),                               /* LPI2C4 interrupt*/
	VECTAB_ENTRY(LPSPI1_IRQ),                               /* LPSPI1 single interrupt vector for all sources*/
	VECTAB_ENTRY(LPSPI2_IRQ),                               /* LPSPI2 single interrupt vector for all sources*/
	VECTAB_ENTRY(LPSPI3_IRQ),                               /* LPSPI3 single interrupt vector for all sources*/
	VECTAB_ENTRY(LPSPI4_IRQ),                               /* LPSPI4  single interrupt vector for all sources*/
	VECTAB_ENTRY(CAN1_IRQ),                                 /* CAN1 interrupt*/
	VECTAB_ENTRY(CAN2_IRQ),                                 /* CAN2 interrupt*/
	VECTAB_ENTRY(FLEXRAM_IRQ),                              /* FlexRAM address out of range Or access hit IRQ*/
	VECTAB_ENTRY(KPP_IRQ),                                  /* Keypad nterrupt*/
	VECTAB_ENTRY(Reserved56_IRQ),                           /* Reserved interrupt*/
	VECTAB_ENTRY(GPR_IRQ_IRQ),                              /* Used to notify cores on exception condition while boot*/
	VECTAB_ENTRY(Reserved58_IRQ),                           /* Reserved interrupt*/
	VECTAB_ENTRY(Reserved59_IRQ),                           /* Reserved interrupt*/
	VECTAB_ENTRY(Reserved60_IRQ),                           /* Reserved interrupt*/
	VECTAB_ENTRY(WDOG2_IRQ),                                /* WDOG2 interrupt*/
	VECTAB_ENTRY(SNVS_HP_WRAPPER_IRQ),                      /* SNVS Functional Interrupt*/
	VECTAB_ENTRY(SNVS_HP_WRAPPER_TZ_IRQ),                   /* SNVS Security Interrupt*/
	VECTAB_ENTRY(SNVS_LP_HP_WRAPPER_IRQ),                   /* ON-OFF button press shorter than 5 secs (pulse event)*/
	VECTAB_ENTRY(CSU_IRQ),                                  /* CSU interrupt*/
	VECTAB_ENTRY(DCP_IRQ),                                  /* Combined DCP channel interrupts(except channel 0) and CRC interrupt*/
	VECTAB_ENTRY(DCP_VMI_IRQ),                              /* IRQ of DCP channel 0*/
	VECTAB_ENTRY(Reserved68_IRQ),                           /* Reserved interrupt*/
	VECTAB_ENTRY(TRNG_IRQ),                                 /* TRNG interrupt*/
	VECTAB_ENTRY(Reserved70_IRQ),                           /* Reserved interrupt*/
	VECTAB_ENTRY(BEE_IRQ),                                  /* BEE interrupt*/
	VECTAB_ENTRY(SAI1_IRQ),                                 /* SAI1 interrupt*/
	VECTAB_ENTRY(SAI2_IRQ),                                 /* SAI1 interrupt*/
	VECTAB_ENTRY(SAI3_RX_IRQ),                              /* SAI3 interrupt*/
	VECTAB_ENTRY(SAI3_TX_IRQ),                              /* SAI3 interrupt*/
	VECTAB_ENTRY(SPDIF_IRQ),                                /* SPDIF interrupt*/
	VECTAB_ENTRY(PMU_IRQ),                                  /* PMU interrupt*/
	VECTAB_ENTRY(Reserved78_IRQ),                           /* Reserved interrupt*/
	VECTAB_ENTRY(TEMP_LOW_HIGH_IRQ),                        /* TEMPMON interrupt*/
	VECTAB_ENTRY(TEMP_PANIC_IRQ),                           /* TEMPMON interrupt*/
	VECTAB_ENTRY(USB_PHY_IRQ),                              /* USBPHY (OTG1 UTMI), Interrupt*/
	VECTAB_ENTRY(Reserved82_IRQ),                           /* Reserved interrupt*/
	VECTAB_ENTRY(ADC1_IRQ),                                 /* ADC1 interrupt*/
	VECTAB_ENTRY(ADC2_IRQ),                                 /* ADC2 interrupt*/
	VECTAB_ENTRY(DCDC_IRQ),                                 /* DCDC interrupt*/
	VECTAB_ENTRY(Reserved86_IRQ),                           /* Reserved interrupt*/
	VECTAB_ENTRY(Reserved87_IRQ),                           /* Reserved interrupt*/
	VECTAB_ENTRY(GPIO1_INT0_IRQ),                           /* Active HIGH Interrupt from INT0 from GPIO*/
	VECTAB_ENTRY(GPIO1_INT1_IRQ),                           /* Active HIGH Interrupt from INT1 from GPIO*/
	VECTAB_ENTRY(GPIO1_INT2_IRQ),                           /* Active HIGH Interrupt from INT2 from GPIO*/
	VECTAB_ENTRY(GPIO1_INT3_IRQ),                           /* Active HIGH Interrupt from INT3 from GPIO*/
	VECTAB_ENTRY(GPIO1_INT4_IRQ),                           /* Active HIGH Interrupt from INT4 from GPIO*/
	VECTAB_ENTRY(GPIO1_INT5_IRQ),                           /* Active HIGH Interrupt from INT5 from GPIO*/
	VECTAB_ENTRY(GPIO1_INT6_IRQ),                           /* Active HIGH Interrupt from INT6 from GPIO*/
	VECTAB_ENTRY(GPIO1_INT7_IRQ),                           /* Active HIGH Interrupt from INT7 from GPIO*/
	VECTAB_ENTRY(GPIO1_Combined_0_15_IRQ),                  /* Combined interrupt indication for GPIO1 signal 0 throughout 15*/
	VECTAB_ENTRY(GPIO1_Combined_16_31_IRQ),                 /* Combined interrupt indication for GPIO1 signal 16 throughout 31*/
	VECTAB_ENTRY(GPIO2_Combined_0_15_IRQ),                  /* Combined interrupt indication for GPIO2 signal 0 throughout 15*/
	VECTAB_ENTRY(GPIO2_Combined_16_31_IRQ),                 /* Combined interrupt indication for GPIO2 signal 16 throughout 31*/
	VECTAB_ENTRY(GPIO3_Combined_0_15_IRQ),                  /* Combined interrupt indication for GPIO3 signal 0 throughout 15*/
	VECTAB_ENTRY(GPIO3_Combined_16_31_IRQ),                 /* Combined interrupt indication for GPIO3 signal 16 throughout 31*/
	VECTAB_ENTRY(Reserved102_IRQ),                          /* Reserved interrupt*/
	VECTAB_ENTRY(Reserved103_IRQ),                          /* Reserved interrupt*/
	VECTAB_ENTRY(GPIO5_Combined_0_15_IRQ),                  /* Combined interrupt indication for GPIO5 signal 0 throughout 15*/
	VECTAB_ENTRY(GPIO5_Combined_16_31_IRQ),                 /* Combined interrupt indication for GPIO5 signal 16 throughout 31*/
	VECTAB_ENTRY(FLEXIO1_IRQ),                              /* FLEXIO1 interrupt*/
	VECTAB_ENTRY(Reserved107_IRQ),                          /* Reserved interrupt*/
	VECTAB_ENTRY(WDOG1_IRQ),                                /* WDOG1 interrupt*/
	VECTAB_ENTRY(RTWDOG_IRQ),                               /* RTWDOG interrupt*/
	VECTAB_ENTRY(EWM_IRQ),                                  /* EWM interrupt*/
	VECTAB_ENTRY(CCM_1_IRQ),                                /* CCM IRQ1 interrupt*/
	VECTAB_ENTRY(CCM_2_IRQ),                                /* CCM IRQ2 interrupt*/
	VECTAB_ENTRY(GPC_IRQ),                                  /* GPC interrupt*/
	VECTAB_ENTRY(SRC_IRQ),                                  /* SRC interrupt*/
	VECTAB_ENTRY(Reserved115_IRQ),                          /* Reserved interrupt*/
	VECTAB_ENTRY(GPT1_IRQ),                                 /* GPT1 interrupt*/
	VECTAB_ENTRY(GPT2_IRQ),                                 /* GPT2 interrupt*/
	VECTAB_ENTRY(PWM1_0_IRQ),                               /* PWM1 capture 0, compare 0, or reload 0 interrupt*/
	VECTAB_ENTRY(PWM1_1_IRQ),                               /* PWM1 capture 1, compare 1, or reload 0 interrupt*/
	VECTAB_ENTRY(PWM1_2_IRQ),                               /* PWM1 capture 2, compare 2, or reload 0 interrupt*/
	VECTAB_ENTRY(PWM1_3_IRQ),                               /* PWM1 capture 3, compare 3, or reload 0 interrupt*/
	VECTAB_ENTRY(PWM1_FAULT_IRQ),                           /* PWM1 fault or reload error interrupt*/
	VECTAB_ENTRY(Reserved123_IRQ),                          /* Reserved interrupt*/
	VECTAB_ENTRY(FLEXSPI_IRQ),                              /* FlexSPI0 interrupt*/
	VECTAB_ENTRY(SEMC_IRQ),                                 /* Reserved interrupt*/
	VECTAB_ENTRY(USDHC1_IRQ),                               /* USDHC1 interrupt*/
	VECTAB_ENTRY(USDHC2_IRQ),                               /* USDHC2 interrupt*/
	VECTAB_ENTRY(Reserved128_IRQ),                          /* Reserved interrupt*/
	VECTAB_ENTRY(USB_OTG1_IRQ),                             /* USBO2 USB OTG1*/
	VECTAB_ENTRY(ENET_IRQ),                                 /* ENET interrupt*/
	VECTAB_ENTRY(ENET_1588_Timer_IRQ),                      /* ENET_1588_Timer interrupt*/
	VECTAB_ENTRY(XBAR1_IRQ_0_1_IRQ),                        /* XBAR1 interrupt*/
	VECTAB_ENTRY(XBAR1_IRQ_2_3_IRQ),                        /* XBAR1 interrupt*/
	VECTAB_ENTRY(ADC_ETC_IRQ0_IRQ),                         /* ADCETC IRQ0 interrupt*/
	VECTAB_ENTRY(ADC_ETC_IRQ1_IRQ),                         /* ADCETC IRQ1 interrupt*/
	VECTAB_ENTRY(ADC_ETC_IRQ2_IRQ),                         /* ADCETC IRQ2 interrupt*/
	VECTAB_ENTRY(ADC_ETC_ERROR_IRQ_IRQ),                    /* ADCETC Error IRQ interrupt*/
	VECTAB_ENTRY(PIT_IRQ),                                  /* PIT interrupt*/
	VECTAB_ENTRY(ACMP1_IRQ),                                /* ACMP interrupt*/
	VECTAB_ENTRY(ACMP2_IRQ),                                /* ACMP interrupt*/
	VECTAB_ENTRY(ACMP3_IRQ),                                /* ACMP interrupt*/
	VECTAB_ENTRY(ACMP4_IRQ),                                /* ACMP interrupt*/
	VECTAB_ENTRY(Reserved143_IRQ),                          /* Reserved interrupt*/
	VECTAB_ENTRY(Reserved144_IRQ),                          /* Reserved interrupt*/
	VECTAB_ENTRY(ENC1_IRQ),                                 /* ENC1 interrupt*/
	VECTAB_ENTRY(ENC2_IRQ),                                 /* ENC2 interrupt*/
	VECTAB_ENTRY(Reserved147_IRQ),                          /* Reserved interrupt*/
	VECTAB_ENTRY(Reserved148_IRQ),                          /* Reserved interrupt*/
	VECTAB_ENTRY(TMR1_IRQ),                                 /* TMR1 interrupt*/
	VECTAB_ENTRY(TMR2_IRQ),                                 /* TMR2 interrupt*/
	VECTAB_ENTRY(Reserved151_IRQ),                          /* Reserved interrupt*/
	VECTAB_ENTRY(Reserved152_IRQ),                          /* Reserved interrupt*/
	VECTAB_ENTRY(PWM2_0_IRQ),                               /* PWM2 capture 0, compare 0, or reload 0 interrupt*/
	VECTAB_ENTRY(PWM2_1_IRQ),                               /* PWM2 capture 1, compare 1, or reload 0 interrupt*/
	VECTAB_ENTRY(PWM2_2_IRQ),                               /* PWM2 capture 2, compare 2, or reload 0 interrupt*/
	VECTAB_ENTRY(PWM2_3_IRQ),                               /* PWM2 capture 3, compare 3, or reload 0 interrupt*/
	VECTAB_ENTRY(PWM2_FAULT_IRQ),                           /* PWM2 fault or reload error interrupt*/

};
